The invention relates to a one-time UV-programmable non-volatile semiconductor memory comprising a number of MOS transistors, which are arranged in a matrix of rows and columns and which serve as memory cells, which MOS transistors include source, drain and channel regions, which are formed in a surface zone of a semiconductor substrate and which adjoin a surface of said semiconductor substrate, which MOS transistors further include floating gates and control gates, which are formed in a layer structure extending on the surface, which layer structure is provided with windows allowing UV radiation to penetrate almost to the floating gates.
Between the channel region and the floating gate, a potential barrier is formed by a layer of a gate oxide, between the floating gate and the control gate a potential barrier is formed by a dielectric which is composed of, for example, a layer of silicon nitride enclosed between two layers of silicon oxide. By exposing charge carriers, which are present near these potential barriers, to UV radiation, these charge carriers can be excited and attain such a high energy level that they are capable of passing these potential barriers. If no electric voltage is applied between the substrate and the control gate during such a radiation process, then any charge present on the floating gate will flow away to the substrate or the control gate. The floating gate will then be discharged. If an electric voltage is applied between the substrate and the control gate during such a radiation process, then electrically charging the floating gate will be possible. By charging the floating gates of a part of the transistors, the memory is programmed. The transistors with a charge on the floating gates exhibit a different threshold voltage than the transistors without a charge on the floating gates. If a voltage that ranges between these threshold voltages is applied to the control gates via word lines, then electric current can flow through transistors having a low threshold voltage, but not through transistors having a high threshold voltage. This is checked by applying a suitable voltage between the source and drain regions via bit lines.
After the pattern of charges has been provided on the floating gates, the semiconductor memory thus programmed is subjected to a xe2x80x9cfinal assemblyxe2x80x9d process, i.e. provided with a customary airtight envelope of a black synthetic resin with pins or strips for external contact. The information stored in the semiconductor memory in the form of charges can be read many times, but it cannot be changed. Such semiconductor memories, also referred to as OTP-ROMs (One-Time Programmable Read Only Memory) can also be used in computers for storing, for example, computer programs, printer fonts or games, but they can also be used, for example, in smart cards.
DE-A-29 12 859 discloses a semiconductor memory of the type mentioned in the opening paragraph, in which, at the location of the floating gates, the UV radiation-transmitting windows are provided in the control gates. The charge carriers present near the dielectric between the floating gate and the control gate, can be excited by exposure to radiation and, as a result thereof, attain such a high energy level that they can pass the potential barrier formed by this dielectric.
The semiconductor memory can be programmed by first providing all floating gates with a charge. In this process, all transistors are simultaneously irradiated, while a voltage is applied between the substrate and the control gates. Subsequently, a part of the floating gates is electrically discharged in accordance with a pattern to be programmed, whereby use is made of, for example, the Fowler-Nordheim tunnel effect. The semiconductor memory can alternatively be programmed by first discharging all floating gates as described above and, subsequently, individually and successively exposing a part of the memory cells, in accordance with the pattern to be programmed, by means of, for example, an UV laser beam, while said voltage is applied between the substrate and the control gates.
In order to program the known semiconductor memory, suitable voltages must be applied between the substrate and the control gates of the individual transistors to electrically discharge the floating gates. For this purpose, electronic circuits must be provided on the semiconductor substrate which, after programming, are no longer necessary, and bond pads must be provided on the semiconductor substrate to enable these circuits to be externally contacted during programming. In addition, in order to externally contact these circuits during programming, expensive equipment is necessary which is provided with contact pins which can be pressed onto said bond pads.
Since the UV radiation-transmitting windows of the known semiconductor memory are formed in the control gates, the memory cells of this semiconductor memory must be comparatively large. For example, when use is made of a xe2x80x9c0.5 xcexcm technologyxe2x80x9d, the manufacture of windows having a length and a width of 0.5 xcexcm requires the control gates and the underlying floating gates to have a length and a width of at least 1 xcexcm in practice. The known semiconductor memory thus takes up a comparatively large substrate surface area.
It is an object of the invention to provide, inter alia, a one-time UV-programmable non-volatile semiconductor memory comprising a number of MOS transistors, which are arranged in a matrix of rows and columns and which serve as memory cells, which semiconductor memory, unlike the above-described prior-art memory, can be programmed without the formation of additional electronic circuits on the semiconductor substrate, without providing bond pads on the semiconductor substrate to externally contact the circuits, and without expensive equipment for externally contacting the circuits.
To achieve this, the semiconductor memory mentioned in the opening paragraph is characterized in accordance with the invention in that the semiconductor memory is provided with means for generating, by means of UV radiation, an electric voltage necessary during programming, between the substrate and the control gates. As a result, the semiconductor memory can be readily programmed in two steps. During the first step, the whole surface of the semiconductor memory is exposed to UV radiation, so that, simultaneously, a voltage is generated between the substrate and the control gates, and charge carriers near the floating gates are excited. The floating gates of all transistors are thus provided with a charge. During the second step, the means for generating an electric voltage between the substrate and the control gates by means of UV radiation are not irradiated and, hence, without a voltage between the substrate and the control gates, a part of the memory cells are individually irradiated in accordance with the pattern to be programmed. The charge on the floating gates of these irradiated transistors is thus removed again. In this manner, the semiconductor memory is programmed without an external voltage being required. The radiation process can be carried out, for example, by successively exposing the memory cells to radiation originating from an UV laser beam. Alternatively, use can be made of an optical projector, such as a so-called xe2x80x9cstepperxe2x80x9d which is customarily used in the semiconductor technology, which optical projector is used to image a mask which corresponds to the pattern to be programmed.
The radiation process during the second step can be carried out by means of much simpler radiation equipment if for the patterned irradiation of a part of the memory cells a mask is formed on the surface, during this second step, which is provided with UV-transmitting windows only at the location of these memory cells to be programmed, after which the entire surface is irradiated by, for example, an UV lamp. Consequently, the means for generating an electric voltage between the substrate and the control gates are shielded by the mask during the radiation process. For reasons of security, the mask is preferably removed after the radiation process. It is thus precluded that the contents of the memory can be retrieved in case of disassembly.
In a first example, the means for generating said voltage by means of UV radiation comprise, for each row of transistors, an UV radiation-accessible photodiode having a semiconductor zone, which is formed in the surface zone, and which is of an opposite conductivity type with respect to the surface zone which is connected, by means of a word line, to the control gates of all transistors in the row. To integrate these photodiodes, comparatively little space on the semiconductor substrate is required.
In another example, the means used to generate said photovoltage comprise an electronic circuit, which is fed by UV radiation-accessible photodiodes formed in the surface zone, which circuit is used to apply a voltage to the control gates of all transistors upon irradiation of the photodiodes, and said circuit being decoupled from the rows of transistors by connecting a supply voltage to the memory. Consequently, when the memory is used, said electronic circuit is decoupled from the rows of transistors.
Preferably, the UV radiation-transmitting windows in the layer structure are arranged so that the gate oxide at the edge of the floating gates is accessible to UV radiation. This enables charge carriers situated near the gate oxide to be excited and provided with so much energy that they are capable of passing the potential barrier formed by the gate oxide. As will become apparent, such windows can be readily formed next to the control gate and the floating gate.
Preferably, the windows are provided with a coating, at the location where the wall of the windows intersects the dielectric between the floating gate and the control gate, which coating is substantially opaque to UV radiation. In this manner, it is achieved that only charge carriers present near the gate oxide can be excited by the UV radiation, while the charge carriers present near the dielectric between the floating gate and the control gate cannot be excited by the UV radiation. It is thus precluded that in the course of a radiation process, whereby a voltage is applied between the substrate and the control gates, charge carriers reaching the floating gate through the gate oxide subsequently leave the floating gate again through the dielectric between the floating gate and the control gate. In this manner, the floating gate can be more efficiently provided with a charge.
In a semiconductor memory comprising very compact memory cells, the surface zone of the semiconductor substrate is provided with adjacent strip-shaped semiconductor zones of, alternately, the first and the second conductivity type, which strip-shaped semiconductor zones adjoin the surface of the semiconductor substrate, and the surface is provided with a layer structure of paths of an insulating material and strip-shaped conductors which are alternately arranged in a side-by-side relationship and extend transversely to the semiconductor zones, floating gates being situated underneath the layer structure, which floating gates are arranged on the crossover points of the strip-shaped semiconductor zones of the first conductivity type and the strip-shaped conductors, which semiconductor zones of the first conductivity type form channel regions under the floating gates, which semiconductor zones of the second conductivity type form bit lines as well as common source and drain regions on either side of the channel regions, and which strip-shaped conductors form both word lines and control gates which are situated above the channel regions, and the UV radiation-transmitting windows being formed on the crossover points of the strip-shaped semiconductor zones of the first conductivity type and the paths of insulating material, the gate oxide at the edge of the floating gates being UV radiation-accessible through said windows. These windows can be readily manufactured so as to be self-aligned with minimum dimensions.
Preferably, the strip-shaped conductors and the underlying floating gates are provided with a layer which is substantially opaque to UV radiation on the sides where they intersect the dielectric between the floating gate and the control gate. The windows are thus readily provided with the above-mentioned coating which is substantially opaque to UV radiation.
When use is made of a xe2x80x9c0.5 xcexcm technologyxe2x80x9d, a memory cell of such a semiconductor memory can be formed on a surface of only 1 xcexcm2. The strip-shaped semiconductor zones as well as the paths of insulating material and conductor tracks formed at right angles thereto then have a width of 0.5 xcexcm. If, in this semiconductor memory, windows having minimum dimensions, i.e. a length and a width of 0.5 xcexcm, would be formed in the control gates, as is the case in the above-described prior-art memory, then the strip-shaped semiconductor zones of the first conductivity type and the conductor tracks arranged transversely thereto had to have a width of approximately 1 xcexcm. This would result in the memory cell having a length and a width of 1.5 xcexcm and hence a surface area of 2.25 xcexcm2.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter.